@CanLehmann@mastodon.social

· 5mo ago

I can finally talk about what I did during the last year! In collaboration with @cfbolz@mastodon.social we developed a Verilog simulator called verijit based on meta-tracing just in time compilers. The results are pretty crazy: verijit is up to 100x faster than verilator for simulating processors.

You can follow us on Mastodon @verijit@mastodon.social

We have a neat mandelbrot demo below:

https://www.youtube.com/watch?v=PXgUsEjvAOY

#fpga #verilog

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Can Lehmann @CanLehmann@mastodon.social

· 2mo ago

A fun project I worked on a bit ago 👀

https://dl.acm.org/doi/10.1145/3830908

#fpga #verilog

dl.acm.org

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@smarr@mastodon.acm.org @lindsey@recurse.social @verijit@mastodon.social @cfbolz@mastodon.social Yes, exactly. The meta-tracing framework essentially creates the 1st Futamura Projection of the CPU's Verilog when treating the instruction memory as static. A full-cycle simulator of a processor is essentially just a very weird interpreter that has things like pipelines.

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@smarr@mastodon.acm.org @lindsey@recurse.social @verijit@mastodon.social Ok, so I just had a little discussion with @cfbolz@mastodon.social and we actually kind of do both. So:

The specialization of the CPU on the instruction stream is the 1st projection
We use a generating extension to generate the traces. So yes, we actually also perform the 2nd projection. As @cfbolz@mastodon.social mentioned this is actually pretty important for tracing performance.

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@ltratt@mastodon.social @verijit@mastodon.social @cfbolz@mastodon.social I think this can be to some extent attributed to how Verilog designs work from an architectural perspective. I don't know the exact numbers right now, but I think we are able to remove >99% of instructions (exact numbers depend on the core anyways, but my point is that the difference is absolutely insane). We also wrote a custom meta-tracer specifically targeted at the problem (https://github.com/can-lehmann/metajit.cpp)

GitHub

GitHub - can-lehmann/metajit.cpp: A meta-tracing JIT

A meta-tracing JIT. Contribute to can-lehmann/metajit.cpp development by creating an account on GitHub.

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@cfbolz@mastodon.social @regehr@mastodon.social We should totally test metajit.cpp's LLVM backend with this.

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@verijit@mastodon.social @cfbolz@mastodon.social We were preparing to launch this week since Monday so I was quite amused when I saw @ltratt@mastodon.social's post on Wednesday 😆

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@thezoq2 What does it do if you render two overlapping texts? Is there an arbiter of something to the font memory?

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Can Lehmann @CanLehmann@mastodon.social

· 4mo ago

RE: @compiler_treffen_karlsruhe@chaos.social

I'd love to chat with some compiler people at GPN 24! We are doing a little self organized session for compiler people to meet up on Saturday (today!) at 16:45. #gpn24

chaos.social

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@smarr@mastodon.acm.org @lindsey@recurse.social @verijit@mastodon.social @cfbolz@mastodon.social This is actually somewhat important in the case of CPUs as otherwise you can get state space explosions really quickly. (trust me, I have suffered through that on a previous project 😆 )

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@smarr@mastodon.acm.org @lindsey@recurse.social @verijit@mastodon.social @cfbolz@mastodon.social I never looked into the actual formal definitions of the Futamura Projections, but I get the sense that they are usually more referenced with respect to partial evaluation rather than meta-tracing. One important difference is that we only create the projection for taken paths and insert guards at all conditions. So maybe it would be more accurate to say that we create a partial 1st futamura projection and recover to the originial interpreter "on domain error"

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@tom_verbeure @verijit @cfbolz It currently requires a small bit of annotation in the form of an external JSON file. While writing these annotations is very manageable in my opinion, we are investigating a couple of options to automate the annotation process. The Verilog itself does not have to be modified at all. You just place it into a testbench and then simulate it. Our simulator does a whole bunch of optimizations and the just in time compilation automatically.

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@cfbolz@mastodon.social @smarr@mastodon.acm.org @ltratt@mastodon.social @verijit@mastodon.social Yeah, I suffer from a mild case of "not invented here syndrome", so writing a meta-tracing framework sounded like lots of fun to me. Sometimes it pays off though :)

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@thezoq2 @cfbolz @verijit I think generally the point is, if there are any open source projects interested in using verijit, come talk to us, maybe we can work something out 😃

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Can Lehmann @CanLehmann@mastodon.social

· 6mo ago

Replying to

@adrian@discuss.systems This is true art.

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@Elegantbeef@mastodon.gamedev.place I think we never really figured out how to properly do async things in owlkettle. I remember most options being kind of hacky. Threading is fundamentally broken because arc/orc is not thread safe and calling poll with a set frequency is also suboptimal as it slows down I/O operations needlessly. How do you handle that here? Is this just synchronous?

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@notbobbytables@infosec.exchange @stacksmashing@infosec.exchange Wait, is there a reason I should not be using ifconfig?

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@miado@discuss.systems I am sadly not very familiar with their work either, it just came to mind while reading through your paper. There is a talk about it here https://www.youtube.com/watch?v=cyMQbZ0B84Q They mention algebraic data types at 7:00, but don't expand on it. Maybe we would have to look at the code to find out how they handle this. I get the feeling that they are somewhat lower level than your IR though. So in that way it probably mirrors what you say about existing dialects mainly targeting LLVM.

2022 LLVM Dev Mtg: MLIR for Functional Programming

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@miado@discuss.systems I don't think they actually preserve ADTs (?), so its also obviously different in that way.

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@miado@discuss.systems Cool work! The dialect reminds me a bit of this: https://arxiv.org/pdf/2201.07272 Though you obviously have a very different compilation target 😃

arxiv.org

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@miado@discuss.systems It would be really cool to be able to lower to both LLVM and CIRCT Core dialects from a single lambda calculus IR though. I am not involved with CIRCT though, the last time I experimented with it it still seemed a bit too early for my applications, so 🤷

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Can Lehmann @CanLehmann@mastodon.social

· 6mo ago

Replying to

@thezoq2 Do they actually have it intergated with nextpnr now? I seem to remember that the last time I looked, their PnR flow was still some external Java thing or something...

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Can Lehmann @CanLehmann@mastodon.social

· 6mo ago

Replying to

@thezoq2 Thats amazing!

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@mtnrbq65 @cfbolz @verijit Thanks! I was also quite surprised that it works this well. When I started this we were not sure if the statistics would work out at all so it is extremely satisfying to see them work out so well 😃

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Can Lehmann @CanLehmann@mastodon.social

· 7mo ago

Replying to

@Elegantbeef@mastodon.gamedev.place Looks nice! Really happy to see people are still building owlkettle apps :)

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Can Lehmann @CanLehmann@mastodon.social

· 5mo ago

Replying to

@penguin42@mastodon.org.uk @verijit@mastodon.social We simulate the actual verilog. So it is completly cycle accurate. I can theoretically pause the simulation at a given point and tell you the values of all verilog registers and memories. Meta-tracing is a really cool technique from JIT compilers which @cfbolz@mastodon.social has been working on for many years. Its the underlying idea we use to JIT compile the verilog for the specific program binary.

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