#cheri

📘 The #CHERI Tag Bit Transport Overlay Standard v0.9 is now available The "0.9" is important: this is not intended to be the final word. We're looking for feedback from people building CHERI systems, interconnects, and IP. Read it, try to break it, and tell us your feedback. 🔗Read the announcement: https://cheri-alliance.org/cheri-tag-bit-transport-overlay-standard-version-0-9-released/

I have had a tab open with the JavaCard spec for a few weeks and I continue to resist the temptation to write a JavaCard implementation for CHERIoT. Please be impressed. I honestly didn't think I'd manage this long. #CHERI #CHERIoT #JavaCard #Java

My latest article for ACM Queue about CHERIoT is live! This describes the design decisions that we made in designing an aggressively privilege-separated OS with a single address space for embedded systems. It's part of a series of articles about designing single-address-space systems and aims to highlight which parts of CHERIoT are things that are a good idea everywhere and which are a good idea only for embedded systems. EDIT: Looks as if they mangled the title, it should read 'usable' not 'able'. EDIT2: And now they have fixed it. #CHERIoT #CHERI #ACMQueue

I wrote this post over a year ago, but it probably needs repeating periodically. From my perspective, CHERI isn't really about security, it's about making it possible to solve a bunch of interesting language-interoperability and end-user-programming problems that happen to need a bunch of security fixed as building blocks. And so we get a load of security stuff for free. But that's not why I worked on it. #CHERI #CHERIoT

When we originally created #CHERIoT, we added an instruction to make accessing globals uniform with respect to the rest of RISC-V. We fairly quickly realised it wasn’t a great design, but the toolchain changes required to eliminate it took a while. We’ve finally done it and I spent a bit of time this week writing up our journey. Removing this instruction is something we always planned to do before rebasing on the upcoming RV32YE base. #CHERI #RISCV

Our Morello system has arrived! #CHERI #ARM #Morello #capabilities