#tinytapeout

I say, you should expect more images coming from the #TinyTapeout folks -- I received a whole bunch of dies from them. Until then, stay safe, stay healthy, and I'll see you next week~

The shuttle includes various RISC-V SoCs, a "3D" ray caster, a 100Mbps 4-port Ethernet switch and beacon, a dual Core BIO from #Baochip1x, three different #TinyTapeout chips, and much more! There are also a number of designs that use the new community-created standard cell library, which is both faster and uses less power: a Linux-capable RISC-V SoC with MMU and FABulous FPGA. Finally, there are new SRAM macros and inductors for validation and characterization, to be used in future runs.

Been meaning to try chip design but never found the time? This workshop is the hello world of ASIC design. In just two sessions you'll go from zero to submitting your first design for manufacture. Here’s how it works… #workshop #TinyTapeout #ASIC #semiconductor #opensource Register: https://tinytapeout.com/online-workshop/