https://mkukri.xyz/2024/06/01/tpm-gpio-fail.html
In this blog post, I describe an attack I've discovered earlier this year that allows system software to forge TPM measurements on some Intel computers.
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@mkukri@mas.to
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But one man's backdoor is another's feature.
It is the only way to configure the UART GPIOs and to get a coreboot console via the UART (connected to the headphone jack via unpopulated resistors).
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@yuka@fedi.yuka.dev See https://review.coreboot.org/c/coreboot/+/84825
You basically just flash a modified ME image alongside coreboot and that is it.
This weekend's platform security fail, this time courtesy of Dell.
Turns out wiring a PNP transistor between an OS controlled GPIO pin and a manufacturing security override strap is a questionable idea....
The result is write access to the firmware flash, what that can be used for is left as an exercise for the reader.
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@neuroexception@infosec.exchange the bootguard "magic" for it is already publicly committed. coreboot port is WIP
ThinkPad T480 coming to #coreboot
@elly@donotsta.re How new is the new in that? T480 will be ported when I overcome general burnout and general reverse engineering induced misery https://review.coreboot.org/c/coreboot/+/83274